CL-PS7111
Low-Power System-on-a-Chip
Symbol Parameter
t42
tNCSRD
tNCSWR
tEXBST
tRC
tRAC
tRP
tCAS
tCP
tPC
tCSR
tRAS
CLKN rising to (internal) RUN active, clock must be on stable
Negative strobe (NCS0–5) zero wait state read access time
Negative strobe (NCS0–5) zero wait state write access time
Sequential expansion burst mode read access time
DRAM cycle time
Access time from RAS
RAS precharge time
CAS pulse width
CAS precharge in Page mode
Page mode cycle time
CAS set-up time for auto refresh
RAS pulse width
13 MHz
18.432 MHz
MIN
120
120
55
230
110
110
30
20
70
20
110
MAX
–
–
–
–
–
–
–
–
MIN
0.125
70
70
35
150
70
70
20
12
45
15
80 *
MAX
–
–
–
–
–
–
–
–
Units
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
76
ELECTRICAL SPECIFICATIONS
September 1997
PRELIMINARY DATA BOOK v2.0