datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

CL-PS7111-VC-A View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CL-PS7111-VC-A
Cirrus-Logic
Cirrus Logic 
CL-PS7111-VC-A Datasheet PDF : 105 Pages
First Prev 71 72 73 74 75 76 77 78 79 80 Next Last
CL-PS7111
Low-Power System-on-a-Chip
6.4 AC Characteristics
All characteristics are specified at VDD = 2.7 to 3.6 volts and VSS = 0 V over an operating temperature of
0°C to +70°C. Parameters marked with an asterisk (*) are not fully tested. Characteristics marked with a
pound sign (#) are significantly different for 13-MHz mode because the EXPCLK is provided as an input
rather than generated internally. These timings are estimated at present.
Symbol Parameter
t1
Falling CS to data bus High-Z
t2
Address change to valid write data
t3
DATA in to falling EXPCLK setup time
t4
DATA in to falling EXPCLK hold time
t5
EXPRDY to falling EXPCLK setup time
t6
Falling EXPCLK to EXPRDY hold time
t7
Rising NMWE to data invalid hold time
t8
Sequential data valid to falling NMWE setup time
t9
Row address to falling NRAS setup time
t10
Falling NRAS to row address hold time
t11
Column address to falling NCAS setup time
t12
Falling NCAS to column address hold time
t13
Write data valid to falling NCAS setup time
t14
Write data valid from falling NCAS hold time
t15
LCD CL2 low time
t16
LCD CL2 high time
t17
LCD Rising CL2 to rising CL1 delay
t18
LCD Falling CL1 to rising CL2
t19
LCD CL1 high time
t20
LCD Falling CL1 to falling CL2
t21
LCD Falling CL1 to FRM toggle
t22
LCD Falling CL1 to M toggle
t23
LCD Rising CL2 to display data change
t24
Falling EXPCLK to address valid
t25
Data valid to falling NMWE for non sequential access only
t41
CLKN rising to (internal) RUN active, clock must be on stable
13 MHz
MIN MAX
18.432 MHz
MIN MAX
Units
0*
35*
0*
25*
ns
0
45
0
35
ns
0#
18
ns
10#
0
ns
0#
18
ns
10#
50#
0
50
ns
10
5
ns
10
10
10
10
ns
5
5
ns
25
25
ns
2
2
ns
25
25
ns
2
2
ns
50
50
ns
80 3,475 80 3,475
ns
80 3,475 80 3,475
ns
0
25
0
25
ns
80 3,475 80 3,475
ns
80 3,475 80 3,475
ns
200 6,950 200 6,950
ns
300 10,425 300 10,425
ns
10
20
10
20
ns
10
20
10
20
ns
33#
5
ns
5
5
ns
1
ms
September 1997
PRELIMINARY DATA BOOK v2.0
75
ELECTRICAL SPECIFICATIONS

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]