CL-PS7111-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CL-PS7111-VC-A Datasheet PDF : 105 Pages
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CL-PS7111
Low-Power System-on-a-Chip
5.13 Interrupt Mask Register 1 — INTMR1
15
SSEOTI
7
EINT3
14
UMSINT
6
EINT2
13
URXINT
5
EINT1
12
UTXINT
4
CSINT
11
TINT
3
MCINT
10
RTCMI
2
WEINT
9
TC2OI
1
BLINT
8
TC1OI
0
EXTFIQ
The Interrupt Mask register 1 is a 32-bit read/write register used to selectively enable the 16 interrupt
sources within the CL-PS7111. The four shaded cells in the previous table are interrupts that generate a
fast interrupt request to the ARM7 processor (FIQ), causing a jump to the processor virtual address
0000.0001C. All other interrupts generate a standard interrupt request; this causes a jump to processor
virtual address 0000.00018. See Table 3-12 on page 37 for the interrupt allocation. Setting the appropri-
ate bit in this register enables the corresponding interrupt. All bits are cleared by a system reset.
5.14 LCD Control Register — LCDCON
31
GSMD
30
GSEN
29:25
AC prescale
24:19
Pixel prescale
18:13
Line length
12:0
Video buffer size
The LCD Control register is a 32-bit read/write that controls the size of the LCD screen and the operating
mode of the LCD controller operates in. Refer to Section 3.10 on page 33 for more information on video
buffer mapping and the LCD controller.
NOTE: The LCDCON register should only be reprogrammed when the LCD controller is disabled.
Bit Description
31 GSMD: Grayscale mode bit. Clearing this bit sets the controller to 2-bits per pixel (4 grayscales). Setting sets the con-
troller to 4-bits per pixel (15 grayscales).
30 GSEN: Grayscale enable bit. Setting this bit enables grayscale output to the LCD. When this bit is cleared, each bit in
the video map directly corresponds to a pixel in the display.
29:25 AC Prescale: The AC prescale field is a 5-bit number that sets LCD AC bias frequency. This frequency is the required
AC bias frequency for a given manufacturer’s LCD plate. This frequency is derived from the frequency of the line clock
(CL1). The ‘M’ signal toggles after n+1 counts of the line clock (CL1) where n is the number programmed into the AC
prescale field. This number must be chosen to match the manufacturer’s recommendation (normally 13), but must not
be exactly divisible by the number of lines in the display.
60
REGISTER DESCRIPTIONS
September 1997
PRELIMINARY DATA BOOK v2.0
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