CS5376
e2dreq bit is automatically set high. When e2dreq
goes low, the data was accepted and new data can
be written.
Write TBS ROM Data - 0x07
Register
SPI1CMD
SPI1DAT1
SPI1DAT2
Command Transaction
0x07 - TBS ROM Data Write Cmd
--
--
This SPI 1 command initializes the included test bit
stream data for use by the test bit stream generator.
This command only requires writing the SPI1CMD
register; the SPI1DAT1 and SPI1DAT2 registers
are not used. See “Test Bit Stream Generator” on
page 81 for more information on generating test
signals using the ROM based test bit stream data
set.
Filter Start - 0x08
Register
SPI1CMD
SPI1DAT1
SPI1DAT2
Command Transaction
0x08 - Filter Start Command
--
--
This SPI 1 command initializes the decimation en-
gine and starts the digital filters. This command
only requires writing the SPI1CMD register; the
SPI1DAT1 and SPI1DAT2 registers are not used.
The decimation engine will use the filtering config-
uration specified in the FILT_CFG register (0x20)
and coefficients specified by previous SPI 1 com-
mands. See “Digital Decimation Filter” on page 53
for details on decimation engine configurations.
Filter Stop - 0x09
Register
SPI1CMD
SPI1DAT1
SPI1DAT2
Command Transaction
0x09 - Filter Stop Command
--
--
This SPI 1 command disables the digital filters in
the decimation engine. This command only re-
quires writing the SPI1CMD register; the
SPI1DAT1 and SPI1DAT2 registers are not used.
The digital filters are disabled by halting the sinc
filters, which stops the data flow through the digital
filter chain. To place the CS5376 into a low power
standby mode, the decimation engine clock can be
set to 32kHz in the CONFIG register (0x00) after
calling this SPI command.
DS256PP1
39