CS53L32A 查看數據表（PDF） - Cirrus Logic
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CS53L32A Datasheet PDF : 40 Pages
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CS53L32A
4.12 LEFT CHANNEL VOLUME = RIGHT CHANNEL VOLUME
Analog I/O Control (address 03h)
7
MUTEL
6
MUTER
5
SOFT
4
3
ZC
RESERVED
Access:
R/W in Two Wire Mode and write only in SPI.
2
INDVC
1
0
L=R
HPFREEZE
Default:
0 - Disabled
Function:
When this function is disabled, the left channel volume is determined by the left channel volume con-
trol register and right channel volume is determined by the right channel volume control register.
When enabled, the left and right channel volumes are determined by the left channel volume control
register and the right channel volume control register is ignored.
4.13 HIGH-PASS FILTER FREEZE
Analog I/O Control Register (address 03h)
7
MUTEL
6
MUTER
5
SOFT
4
3
ZC
RESERVED
Access:
R/W in Two Wire Mode and write only in SPI.
2
INDVC
1
0
L=R
HPFREEZE
Default:
0 - Enabled
Function:
The high-pass filter works by continuously subtracting a measure of the dc offset from the output of
the decimation filter. If the HPFREEZE bit is taken low during normal operation, the current value of
the dc offset is frozen and this dc offset will continue to be subtracted from the conversion result. This
feature makes it possible to perform a system calibration by:
1) removing the signal source at the input to the subsystem containing the CS53L32A,
2) running the CS53L32A with the HPFREEZE bit high until the filter settles, approximately
one second,
3) taking the HPFREEZE bit low, thus disabling the high-pass filter and freezing the stored dc offset.
A system calibration performed in this way will eliminate offsets anywhere in the signal path between
the calibration point and the CS53L32A.
HPFREEZE
0
1
MODE
Enabled
Frozen
Table 12. High-Pass Filter Enable
24
DS513F1
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