CL-PS7111-VC-A 查看數據表（PDF） - Cirrus Logic

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CL-PS7111-VC-A

Low-Power System-on-a-Chip

Cirrus Logic 

CL-PS7111

Low-Power System-on-a-Chip

Bit Description (cont.)

14 CDENRX: Codec interface enable Rx bit. Setting this bit enables the codec interface for data reception from an exter-

nal codec device.

NOTE: Both CDENRX and CDENTX must be enabled/disabled in tandem.

13 CDENTX: Codec interface enable Tx bit. Setting this bit enables the codec interface for data transmission to an exter-

nal codec device.

12 LCDEN: LCD enable bit. Setting this bit enables the LCD controller.

11 DBGEN: Setting this bit enables debug mode. In this mode all internal accesses are output as if they were reads or writes

to expansion memory addressed by NCS5. NCS5 remains active in its standard address range. In addition, the internal

interrupt request and fast interrupt request signals to the ARM710a microprocessor are output on Port E bits 1 and 2 in

Debug mode.

NOTE: These bits must be programmed as outputs before this functionality can be observed.

The clock to the ARM CPU is output on Port E bit 0 in debug mode to enable individual accesses to be distinguished:

NCS5 = NCS5 or internal I/O strobe

PE0 = CLK

PE1 = NIRQ

PE2 = NFIQ

10 BZMOD: This bit sets the Buzzer Drive mode. 0 = the buzzer drive is connected directly to the BZTOG bit. 1 = the

buzzer drive is connected to the TC1 under-flow bit.

9 BZTOG: Bit to directly drive buzzer.

8 UART1EN: Internal UART enable bit. Setting this bit enables the internal UART.

7 TC2S:Timer Counter 2 clock source. Setting this bit sets the TC2 clock source to 512 kHz, clearing it sets the clock

source to 2 kHz (assuming an 18.432-MHz clock).

6 TC2M: Timer Counter 2 (TC2) mode. Setting this bit sets TC2 to Prescale mode, clearing it sets Free-running mode.

5 TC1S: Timer Counter 1 clock source. Setting this bit sets the TC1 clock source to 512 kHz, clearing it sets the clock

source to 2 kHz (assuming an 18.432-MHz clock).

4 TC1M: Timer Counter 1 (TC1) mode. Setting this bit sets TC1 to Prescale mode, clearing it sets Free-running mode.

September 1997

PRELIMINARY DATA BOOK v2.0

49

REGISTER DESCRIPTIONS

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