
CL-PS7111
Low-Power System-on-a-Chip
Bit Description (cont.)
5:4 Sequential Access Wait State:
Bit
No. of Wait States
54
00
3
01
2
10
1
11
0
3:2 Random Access Wait State:
Bit
No. of Wait States
32
00
4
01
3
10
2
11
1
September 1997
PRELIMINARY DATA BOOK v2.0
55
REGISTER DESCRIPTIONS