CL-PS7111
Low-Power System-on-a-Chip
Bit Description (cont.)
7:4 DID: Display ID nibble. This 4-bit nibble reflects the latched state of the four LCD data lines. The state of the four LCD
data lines is latched by the LCDEN bit and always reflect the last state of these lines before the LCD controller was
enabled. These bits identify the LCD display panel.
3 WUON: This bit is set if the system is brought out of standby by a rising edge on the WAKEUP signal. This bit is
cleared by a system reset or by writing to the HALT or STDBY locations.
2 WUDR: Wake-up direct read. This bit reflects the non-latched state of the WAKEUP signal.
1 DCDET: This bit is set if the main adapter is powering the system (the inverted state of the NDCDET input pin).
0 MCDR: Media changed direct read. This bit reflects the non-latched status of the media changed input.
52
REGISTER DESCRIPTIONS
September 1997
PRELIMINARY DATA BOOK v2.0