C8051F007 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051F007

Mixed-Signal 32KB ISP FLASH MCU Family

Silicon Laboratories 

C8051F000/1/2/5/6/7

C8051F010/1/2/5/6/7

Figure 15.4. XBR1: Port I/O CrossBar Register 1

R/W

R/W

R/W

R/W

R/W

SYSCKE T2EXE

T2E

INT1E

T1E

Bit7

Bit6

Bit5

Bit4

Bit3

Bit7:

Bit6:

Bit5:

Bit4:

Bit3:

Bit2:

Bit1:

Bit0:

SYSCKE: SYSCLK Output Enable Bit

0: SYSCLK unavailable at Port pin.

1: SYSCLK output routed to Port Pin.

T2EXE: T2EX Enable Bit

0: T2EX unavailable at Port pin.

1: T2EX routed to Port Pin.

T2E: T2 Enable Bit

0: T2 unavailable at Port pin.

1: T2 routed to Port Pin.

INT1E: /INT1 Enable Bit

0: /INT1 unavailable at Port pin.

1: /INT1 routed to Port Pin.

T1E: T1 Enable Bit

0: T1 unavailable at Port pin.

1: T1 routed to Port Pin.

INT0E: /INT0 Enable Bit

0: /INT0 unavailable at Port pin.

1: /INT0 routed to Port Pin.

T0E: T0 Enable Bit

0: T0 unavailable at Port pin.

1: T0 routed to Port Pin.

CP1OEN: Comparator 1 Output Enable Bit

0: CP1 unavailable at Port pin.

1: CP1 routed to Port Pin.

R/W

INT0E

Bit2

R/W

R/W

Reset Value

T0E

CP1OEN 00000000

Bit1

Bit0

SFR Address:

0xE2

107

Rev. 1.7

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