CS8900 查看數據表（PDF） - Cirrus Logic

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CS8900

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

the Interrupt Status Queue are discarded because

the host cannot process those events until the

corresponding frames have been completely

DMAed.

Auto-Switch DMA works only on entire received

frames. The CS8900 does not use Auto-Switch

DMA to transfer partial frames. Also, when a

frame has been committed (see Section 5.2.5),

the CS8900 will not switch to DMA mode until

the committed frame has been transferred com-

pletely or skipped.

After a complete frame has been moved to host

memory, the CS8900 updates the DMA Start-of-

Frame register (PacketPage base + 0126h), the

DMA Frame Count register (PacketPage base +

0128h), and the DMA Byte Count register, then

sets the RxDMAFrame bit (Register C,

BufEvent, bit 7). If RxDMAiE (Register B,

BufCFG, bit 7) is set, a corresponding interrupt

occurs.

DMA Channel Speed vs. Missed Frames

When the CS8900 starts DMA, the entire oldest,

noncommitted frame must be placed in host

memory before on-chip buffer space will be

freed for the next incoming frame. If the oldest

frame is relatively large, and the next incoming

frame also large, the incoming frame may be

missed, depending on the speed of the DMA

channel. If this happens, the CS8900 will incre-

ment the RxMiss counter (Register 10) and clear

any event reports (RxEvent and BufEvent) asso-

ciated with the missed frame.

Exit From DMA

When the CS8900 has activated receive DMA, it

remains in DMA mode until all of the following

are true:

• The host processes all RxEvent and

BufEvent reports pending in the ISQ.

• The host reads a zero value from the DMA

Frame Count register (PacketPage base +

0028h).

• The CS8900 is not in the process of transfer-

ring a frame via DMA.

Auto-Switch DMA Example

Figure 5.9 shows how the CS8900 enters and ex-

its Auto-Switch DMA mode.

DS150PP2

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