CS7654 查看數據表（PDF） - Cirrus Logic

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CS7654

CCD Color-Space Processor with Analog Output

Cirrus Logic 

CS7654

Scaler Control 3 (2Fh at SA 0x34h)

7

OFFSET7

6

OFFSET6

5

OFFSET5

4

3

OFFSET4 OFFSET3

R/W

2

OFFSET2

OFFSET[7:0]

This value controls the offset fo the internal Scaler.

1

OFFSET1

0

OFFSET0

Configuration Control 0 (30h at SA 0x34h)

7

6

5

4

3

2

1

0

res

res

res

res

res

SKP010

SKP09

SKP08

Reserved

R/W

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h at SA

0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 00h.

Configuration Control 1 (31h at SA 0x34h)

7

SKP07

6

SKP06

5

SKP05

4

3

SKP04

SKP03

R/W

2

SKP02

1

SKP01

0

SKP00

This register contains the 8 LSBs of the EEPROM start address used when the SKIP bit is set (bit1 register 42h at

SA 0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 00h.

Configuration Control 2 (32h at SA 0x34h)

7

6

5

4

3

2

1

0

res

res

res

res

res

SKP110

SKP19

SKP18

Reserved

R/W

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h at SA

0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 01h.

Configuration Control 3 (33h at SA 0x34h)

7

SKP17

6

SKP16

5

SKP15

4

3

SKP14

SKP13

R/W

2

SKP12

1

SKP11

0

SKP10

This register contains the 8 LSBs of the EEPROM start address used when the SKIP bit is set (bit1 register 42h at

SA 0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 01h.

Configuration Control 4 (34h at SA 0x34h)

7

6

5

4

3

2

1

0

res

res

res

res

res

SKP210

SKP29

SKP28

Reserved

R/W

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h at SA

0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 02h.

49

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