CS7654 查看數據表（PDF） - Cirrus Logic
零件编号
产品描述 (功能)
生产厂家
CS7654 Datasheet PDF : 62 Pages
| |||
CS7654
Address
[2C]
[2D]
[2E]
[2F]
[30]
[31]
[32]
[33]
[34]
[35]
[36]
[37]
[38]
[39]
[3A]
[3B]
[3C]
[3D]
[3E]
[3F]
[40]
[41]
[42]
[43]
[44]
[FE]
[FF]
Register Name
Flare control 6
Scaler control 1
Scaler control 2
Scaler control 3
Config 0
Config 1
Config 2
Config 3
Config 4
Config 5
Config 6
Config 7
Config 8
Config 9
Config 10
Config 11
Config 12
Config 13
Config 14
Config 15
Jump 0
Jump 1
EEPROM control
Config index
Reserved
Reserved
Station address
Table 14. DSP Control Register (Continued)
Type
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Defaultvalue
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
1Ah
Master Reset Register (00h at SA 0x34h )
7
6
5
4
3
2
1
0
res
res
res
res
res
res
res
MR
Reserved
W
MR
Setting bit MR0 to logic high will initiate a CS7654 master reset equivalent to executing an ex-
ternal reset using the RESET pin. All registers will be placed in their default state, and the down-
load of any external EPROM present on the secondary I2C bus will be initiated. The bit is self-cleared.
Status Register (01h at SA 0x34h)
7
res
Reserved
6
P4BYTE
R
5
res
Reserved
4
HIZENB
R
3
INITACT
R
2
I2CBUSY
R
1
NODEV
R
0
EVNFLD
R
EVNFLD
Logic high indicates even field of interline-transfer CCD. Logic low indicates odd field of inter-
line-transfer CCD. This bit provides a course means of synchronizing to the field rate.
NODEV
Logic high indicates that the addressed slave device on the secondary I2C bus did not respond.
41
Share Link: 