CS7654 查看數據表（PDF） - Cirrus Logic
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CS7654 Datasheet PDF : 62 Pages
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CS7654
Flare Control 3 (29h at SA 0x34h)
7
Cb_L9
6
Cb_L8
5
Cb_L7
4
3
Cb_L6
Cb_L5
R/W
2
Cb_L4
1
Cb_L3
Cb_L[9:2]
Flare control filter Cb low threshold bits 9-2 (MSB). (Bits 1 and 0 set to 0.)
0
Cb_L2
Flare Control 4 (2Ah at SA 0x34h)
7
Cr_H9
6
Cr_H
5
Cr_H7
4
3
Cr_H6
Cr_H5
R/W
Cr_H[9:2]
Flare control filter Cr high threshold bits 9-2 (MSB).
2
Cr_H4
1
Cr_H3
0
Cr_H2
Flare Control 5 (2Bh at SA 0x34h)
7
Cb_H9
6
Cb_H8
5
Cb_H7
4
3
Cb_H6
Cb_H5
R/W
2
Cb_H4
1
Cb_H3
Cb_H[9:2]
Flare control filter Cb high threshold bits 9-2 (MSB). (Bits 1 and 0 set to 0.)
0
Cb_H2
Flare Control 6 (2Ch at SA 0x34h)
7
6
Cb_H1
Cb_H0
R/W
5
4
Cr_H1
Cr_H0
R/W
3
2
Cb_L1
Cb_L0
R/W
Cr_L[1:0]
Flare control filter Cr low threshold bits 1 and 0.
Cb_L[1:0]
Flare control filter Cb low threshold bits 1 and 0.
Cr_H[1:0]
Flare control filter Cr high threshold bits 1 and 0.
Cb_H[1:0]
Flare control filter Cb high threshold bits 1 and 0.
1
0
Cr_L1
Cr_L0
R/W
Scaler Control 1 (2Dh at SA 0x34h)
7
6
BYPASS1 BYPASS0
R/W
5
res
Reserved
4
PLL_M4
3
PLL_M3
2
PLL_M2
R/W
1
PLL_M1
PLL_M[4:0]
This is the PLL M value when the CUSTOM bit (bit 3 register 04h) is set.
BYPASS[1:0]
See PLL section.
0
PLL_M0
Scaler Control 2 (2Eh at SA 0x34h)
7
HALF
R/W
PLL_N[4:0]
6
5
res
res
Reserved
4
PLL_N4
3
PLL_N3
2
PLL_N2
R/W
1
PLL_N1
0
PLL_N0
This is the PLL N value when the CUSTOM bit (bit 3 register 04h at SA 0x34h) is set.
HALF
Sets the internal PLL reference clock to 1/2 the input clock.
48
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