CS7615 查看數據表（PDF） - Cirrus Logic
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CS7615 Datasheet PDF : 36 Pages
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CS7615
Timing Control - H1X Registers (5Fh-61h)
5Fh:
7
VH1F9
r/w
6
VH1F8
r/w
5
VH1F7
r/w
4
VH1F6
r/w
3
VH1F5
r/w
2
VH1F4
r/w
60h:
7
VH1R9
r/w
6
VH1R8
r/w
5
VH1R7
r/w
4
VH1R6
r/w
3
VH1R5
r/w
2
VH1R4
r/w
61h:
7
6
5
4
3
2
res
res
res
res
VH1R1
VH1R0
r
r
r
r
r/w
r/w
Charge read out timing for VH1X in number of pixels.
VH1F
From HREF to leading edge of VH1X. Default is 18Fh.
VH1R
From HREF to trailing edge of VH1X. Default is 1ADh.
Timing Control - VH1X Registers (62h-64h)
62h:
7
VH3F9
r/w
6
VH3F8
r/w
5
VH3F7
r/w
4
VH3F6
r/w
3
VH3F5
r/w
2
VH3F4
r/w
63h:
7
VH3R9
r/w
6
VH3R8
r/w
5
VH3R7
r/w
4
VH3R6
r/w
3
VH3R5
r/w
2
VH3R4
r/w
64h:
7
6
5
4
3
2
res
res
res
res
VH3R1
VH3R0
r
r
r
r
r/w
r/w
Charge read out timing for VH3X in number of pixels.
VH3F
From HREF to leading edge of VH3X. Default is 1B7h.
VH3R
From HREF to trailing edge of VH3X. Default is 1D5h.
1
VH1F3
r/w
1
VH1R3
r/w
1
VH1F1
r/w
1
VH3F3
r/w
1
VH3R3
r/w
1
VH3F1
r/w
0
VH1F2
r/w
0
VH1R2
r/w
0
VH1F0
r/w
0
VH3F2
r/w
0
VH3R2
r/w
0
VH3F0
r/w
28
DS231PP6
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