CS5376-BS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5376-BS

Low Power Multi-Channel Decimation Filter

Cirrus Logic 

CS5376

both cases the CS5376 is in contention with the ex-

ternal device and will result in increased power

consumption.

14.3 GPIO Chip Select

When the CS5376 is used as an SPI master GPIO8-

GPIO11 (CS8-CS11) operate as SPI 1 chip selects

and GPIO0-GPIO4 (CS0-CS4) operate as SPI 2

chip selects. The chip select signal from the SPI 1

and SPI 2 blocks are logically AND-ed with the

corresponding GPIO data bit. The GPIO pin should

be set as output mode and a logical 1 to produce the

chip select falling edge required for most serial pe-

ripherals. See “Serial Peripheral Interface 1” on

page 21 and “Serial Peripheral Interface 2” on

page 40 for details on the SPI ports.

14.4 GPIO Pin Descriptions

GPIO0 - GPIO4 (CS0 - CS4) - Pins 32 - 36

The low group of GPIO pins, GPIO0-GPIO4, can

be used as standard GPIO pins or as chip selects for

the SPI 2 port. Each pin can be individually set for

either mode.

When used as standard GPIO pins, the settings are

programmed in the GPCFG0 register. The GP_DIR

bits (bits 16-20) set the input/output mode, the

GP_PULL bits (bits 8-12) enable/disable the inter-

nal pull-up resistor, and the GP_DATA bits (bits 0-

4) set the data value.

When used as SPI 2 chip selects, the GPIO pin

should be programmed in GPCFG0 as output mode

and a logical 1 so the serial device connected to it

will be de-selected by default. When an SPI 2

transaction to the device begins, the GPIO pin au-

tomatically goes low to act as a chip select.

GPIO5 - GPIO7 - Pins 37, 41, 42

The middle group of GPIO pins, GPIO5-GPIO7,

can only be used as standard GPIO pins, and are

programmed in the GPCFG0 register. In the

GPCFG0 register, GP_DIR (bits 20-23) sets the in-

put/output mode, GP_PULL (bits 13-15) en-

ables/disables the internal pull-up resistor, and

GP_DATA (bits 5-7) sets the data value.

GPIO8 - GPIO11 (CS8-CS11) - Pins 43 - 46

The high group of GPIO pins, GPIO8-GPIO11, can

be used as standard GPIO pins or as chip selects for

the SPI 1 port. Each pin can be individually set for

either mode.

When used as standard GPIO pins, the settings are

programmed in the GPCFG1 register. The GP_DIR

bits (bits 16-19) set the input/output mode, the

GP_PULL bits (bits 8-11) enable/disable the inter-

nal pull-up resistor, and the GP_DATA bits (bits 0-

3) set the data value.

When used as SPI 1 chip selects, the GPIO pin

should be programmed in GPCFG1 as output mode

and a logical 1 so the serial device connected to it

will be de-selected by default. When an SPI 1

transaction to the device begins, the GPIO pin au-

tomatically goes low to act as a chip select.

GPIO[11:0] - General Purpose Input/Output, pins 32 to 37, 41 to 46

General purpose pins for controlling local peripherals. Also used as chip selects for the

SPI ports.

Figure 59. General Purpose I/O Pins

DS256PP1

86

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