CS89712-CB View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS89712-CB

High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller

Cirrus Logic 

CS89712

Figure 16 provides a diagram of the ENDEC and its

interface to the MAC and 10BASE-T transceiver.

2.27.1 Encoder

The encoder converts NRZ data from the MAC and

a 20 MHz Transmit Clock signal into a serial

stream of Manchester data. The Transmit Clock is

produced by an on-chip oscillator circuit that is

driven by either an external 20 MHz quartz crystal

or a TTL-level CMOS clock input. The encoded

signal is routed to the 10BASE-T transceiver.

2.27.2 Carrier Detection

The internal Carrier Detection circuit informs the

MAC that valid receive data is present by asserting

the internal Carrier Sense signal as soon it detects a

valid bit pattern (1010b or 0101b for 10BASE-T.

During normal packet reception, Carrier Sense re-

mains asserted while the frame is being received,

and is deasserted 1.3 to 2.3 bit times after the last

low-to-high transition of the End-of-Frame (EOF)

sequence. Whenever the receiver is idle (no receive

activity), Carrier Sense is deasserted. The CRS bit

(LineST register bit E) reports the state of the Car-

rier Sense signal.

2.27.3 Clock and Data Recovery

When the receiver is idle, the phase-lock loop

(PLL) is locked to the internal clock signal. The as-

sertion of the Carrier Sense signal interrupts the

PLL. When it restarts, it locks on the incoming da-

ta. The receive clock is then compared to the in-

coming data at the bit cell center and any phase

difference is corrected. The PLL remains locked as

long as the receiver input signal is valid. Once the

PLL has locked on the incoming data, the ENDEC

converts the Manchester data to NRZ and passes

the decoded data and the recovered clock to the

MAC for further processing.

2.28 10BASE-T Transceiver

The Ethernet port includes an integrated 10BASE-

T transceiver that is compliant with the relevant

portions of section 14 of the Ethernet standard

(ISO/IEC 8802-3, 1993). It includes all analog and

digital circuitry needed to interface the Ethernet

port directly to a simple isolation transformer (see

the Characteristics/Specifications section for a con-

nection diagram). Figure 17 provides a block dia-

gram of the 10BASE-T transceiver.

2.28.1 10BASE-T Filters

The CS89712’s 10BASE-T transceiver includes in-

tegrated low-pass transmit and receive filters, elim-

Carrier Sense

RX CLK

MAC

RX NRZ

TXCLK

TX NRZ

TEN

Port Select

ENDEC

Carrier

Detector

Decoder

& PLL

RX

MUX

Encoder

TX

MUX

RXSQL

10BASE-T

RX

Transceiver

TX

Clock

Figure 16. ENDEC

52

DS502PP2

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