C8051T603-GS(2007) View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051T603-GS
(Rev.:2007)

Mixed Signal OTP EPROM MCU Family

Silicon Laboratories 

C8051T600/1/2/3/4/5

5.6.3. Settling Time Requirements

A minimum amount of tracking time is required before each conversion can be performed, to allow the

sampling capacitor voltage to settle. This tracking time is determined by the AMUX0 resistance, the ADC0

sampling capacitance, any external source resistance, and the accuracy required for the conversion. Note

that in delayed tracking mode, an additional three SAR clocks are used for tracking at the start of every

conversion. For many applications, these three SAR clocks will meet the minimum tracking time require-

ments, and higher values for the external source impedance will increase the required tracking time.

Figure 5.5 shows the equivalent ADC0 input circuit. The required ADC0 settling time for a given settling

accuracy (SA) may be approximated by Equation 5.1. When measuring the Temperature Sensor output or

VDD with respect to GND, RTOTAL reduces to RMUX. See Table 5.1 for ADC0 minimum settling time (track/

hold time) requirements.

t

=

ln

⎛

⎝

S-2---A-n-⎠⎞

×

RTOTALCSAMPLE

Equation 5.1. ADC0 Settling Time Requirements

Where:

SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)

t is the required settling time in seconds

RTOTAL is the sum of the AMUX0 resistance and any external source resistance.

n is the ADC resolution in bits (10).

MUX Select

P0.x

RMUX = 5k

RCInput= RMUX * CSAMPLE

CSAMPLE = 5pF

Note: When the PGA gain is set to 0.5, CSAMPLE = 3pF

Figure 5.5. ADC0 Equivalent Input Circuits

38

Rev. 0.5

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