ACS411CS View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
ACS411CS Datasheet PDF : 43 Pages
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Jitter Characteristics
The receive path includes a Phase Locked Loop block,
which provides an independent PLL for each
transmission channel. The purpose of each PLL is to
regenerate the clock signal such that it tracks the
transmit clock of the far end modem. The PLL will also
attenuate the jitter present in the received data stream.
For E1, E2, T1 and T2 modes, the PLL algorithm
implemented is entirely digital. For E3, T3 and OC1/
STS1 modes, the PLL block utilised a mixed signal PLL
algorithm. The mixed signal PLL does not require the
use of external tuning components.
The dynamic range of all PLL algorithms is +/- 500ppm.
The dynamic range is used to accommodate oscillator
frequency differences between the two communicating
modems, as well as any jitter and wander present in the
received data stream.
The jitter characteristics for the ACS4110 is independent
of the binary content of the transmitted data stream.
T1 Jitter specification
When configured for T1 operation, the Jitter Tolerance
and Jitter Transfer performance conforms to that
specified in AT&T Publication 62411.
1000
T1 Jitter Tolerance
100
10
1
0.1
1.0E-01
1.0E+00 1.0E+01
1.0E+02
1.0E+03 1.0E+04
1.0E+05
0
1.0E-01
-10
1.0E+00
T1 Jitter Transfer
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05
-20
-30
-40
-50
-60
Figure 15: T1 Jitter specifications.
25
ACS411CS PRE-RELEASE Issue 6.0 July 1999.
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