CS5376 查看數據表（PDF） - Cirrus Logic

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CS5376

Low Power Multi-Channel Decimation Filter

Cirrus Logic 

CS5376

SYNC

MCLK

(2.048 MHz)

MSYNC

tmsd

tmsh

tmsd

MDATAx

(512 kHz)

Data1

Data2

Note: MDATA at 256 kHz has the same start timing, but takes 8 MCLK cycles to update.

tmsd = TMCLK / 4

tmsh = TMCLK

For fMCLK = 2.048 MHz:

tmsd = 122 ns

tmsh = 488 ns

Figure 52. SYNC and MSYNC Timing

The SYNC signal must be distributed across a net-

work so that it arrives at every measurement node

simultaneously. This can only be guaranteed by

careful design of the SYNC signal distribution in

the network. See “System Design” on page 13 for

more information about the design requirements

for the SYNC signal in an external network.

12.3 CS5376 Internal Synchronization

The SYNC signal rising edge is used to generate an

internal re-timed synchronization signal, MSYNC,

as shown in Figure 52. The MSYNC signal is used

internally to reinitialize the sinc filters, decimation

engine, serial data output port, time break counter,

and test bit stream generator. It is also output to the

MSYNC pin to phase align the modulator sampling

instants, giving precise sample timing across the

network.

The MSEN bit in the CONFIG register (0x00) en-

ables MSYNC generation. When MSEN is en-

abled, the MSYNC output signal is generated and

MSYNC is used as an internal synchronization sig-

nal when a rising edge is detected on the SYNC pin.

When MSEN is disabled, the MSYNC output re-

mains low and the internal blocks are not affected

by the SYNC signal.

12.3.1 Sinc Filter Synchronization

The sinc filters use the rising edge of MSYNC to

reset the internal state machine and data pointers.

While the data pointers used to access the sinc filter

registers are reset, the registers themselves are not

cleared. The initial output data from the sinc filters

after an MSYNC event will be a combination of

pre-sync and post-sync data. Valid data is output

once all the sinc filter registers have been overwrit-

ten with new data.

DS256PP1

78

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