SI5328C-C-GM 查看數據表（PDF） - Silicon Laboratories

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SI5328C-C-GM

ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

Silicon Laboratories 

Si5328

Register 40.

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

N2_HS [2:0]

Reserved

N2_LS [19:16]

Type

R/W

R

R/W

Reset value = 1100 0000

Bit

Name

Function

7:5 N2_HS [2:0] N2_HS [2:0].

Sets value for N2 high speed divider, which drives N2LS low-speed divider.

000: 4

001: 5

010: 6

011: 7

100: 8

101: 9

110: 10

111: 11

4

Reserved Reserved.

3:0 N2_LS [19:16] N2_LS [19:16].

Sets value for N2 low-speed divider, which drives phase detector.

00000000000000000001 = 2

00000000000000000011 = 4

00000000000000000101 = 6

...

11111111111111111111 = 220

Valid divider values = [2, 4, 6, ..., 220]

42

Rev. 1.0

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