SI5328C-C-GM 查看數據表（PDF） - Silicon Laboratories

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SI5328C-C-GM

ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

Silicon Laboratories 

Si5328

Register 11.

Bit

D7

D6

D5

D4

D3

D2

Name

Reserved

Type

R

Reset value = 0100 0000

Bit

Name

Function

7:2 Reserved Reserved.

1

PD_CK2 PD_CK2.

This bit controls the powerdown of the CKIN2 input buffer.

0: CKIN2 enabled

1: CKIN2 disabled

0

PD_CK1 PD_CK1.

This bit controls the powerdown of the CKIN1 input buffer.

0: CKIN1 enabled

1: CKIN1 disabled

D1

PD_CK2

R/W

D0

PD_CK1

R/W

Rev. 1.0

31

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