SC403BEVB 查看數據表（PDF） - Semtech Corporation
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SC403BEVB Datasheet PDF : 32 Pages
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SC403B
Applications Information
Synchronous Buck Converter
The SC403B is a step down synchronous DC-DC buck
converter with integrated power MOSFETs and a 200mA
programmable LDO. The device operates at a current up
to 6A at very high efficiency. A space saving 5x5 (mm) 32-
pin package is used. The programmable operating fre-
quency of up to 1MHz enables optimizing the
configuration for PCB area and efficiency.
The buck controller uses a pseudo-fixed frequency adap-
tive on-time control. This control method allows fast tran-
sient response which permits the use of smaller output
capacitors.
In addition to the following information, the user can
click on the applicable link to go to the SC403B online
C-SIM design and simulation tool, which will lead the
user through the design process.
Psuedo-fixed Frequency Adaptive On-time Control
The PWM control method used by the SC403B is pseudo-
fixed frequency, adaptive on-time, as shown in Figure 1.
The ripple voltage generated at the output capacitor ESR
is used as a PWM ramp signal. This ripple is used to trigger
the controller on-time.
VIN
Q1
VLX
Q2
TON
VLX
CIN
VFB
FB Threshold
L
ESR
+
COUT
VOUT
FB
Input Voltage Requirements
The SC403B requires two input supplies for normal opera-
tion: VIN and VDD. VIN operates over a wide range from 3V to
28V. VDD requires a supply voltage between 3V to 5V that
can be an external source or the internal LDO from VIN.
Power Up Sequence
The SC403B initiates a start up when VIN, VDD, and EN/
PSV pins are above the applicable thresholds. When using
an external bias supply for the VDD voltage, it is recom-
mended that the VDD is applied to the device only after
the VIN voltage is present because VDD cannot exceed VIN
at any time. A 10Ω resistor must be placed between the
external VDD supply and the VDD pin to avoid damage to
the device during power-up and or shutdown situations
where VDD could exceed VIN unexpectedly.
Shutdown
The SC403B can be shutdown by pulling either VDD or
EN/PSV pin below its threshold. When using an external
supply voltage for VDD, the VDD pin must be deactivated
while the VIN voltage is still present. A 10Ω resistor must
be placed between the external VDD supply and the VDD
pin to avoid damage to the device.
When the VDD pin is active and EN/PSV is at low logic level,
the output voltage discharges through an internal FET.
Figure 1 — PWM Control Method, VOUT Ripple
The adaptive on-time is determined by an internal one-
shot timer. When the one-shot is triggered by the output
ripple, the device sends a single on-time pulse to the high-
side MOSFET. The pulse period is determined by VOUT and
VIN. The period is proportional to output voltage and
inversely proportional to input voltage. With this adaptive
on-time arrangement, the device automatically antici-
pates the on-time needed to regulate VOUT for the present
VIN condition and at the selected frequency.
The advantages of adaptive on-time control are:
• Predictable operating frequency compared to
other variable frequency methods.
• Reduced component count by eliminating the
error amplifier and compensation components.
• Reduced component count by removing the
need to sense and control inductor current.
• Fast transient response — the response time is
controlled by a fast comparator instead of a typi-
cally slow error amplifier.
• Reduced output capacitance due to fast tran-
sient response
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