PCA8538UG(2014) 查看數據表（PDF） - NXP Semiconductors.
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PCA8538UG Datasheet PDF : 107 Pages
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NXP Semiconductors
PCA8538
Automotive 102 x 9 Chip-On-Glass LCD segment driver
• by one (1:8 and 1:9 multiplex drive mode)
When the address counter reaches the end of the RAM, it stops incrementing after the last
byte is transmitted. Redundant bits of the last byte and subsequent bytes transmitted are
discarded. To send new RAM data, the data pointer must be reset.
If a data access with the I2C- or SPI-bus is terminated early, then the state of the data
pointer is unknown. The data pointer must then be re-written before further RAM
accesses.
8.14.1.1 Data pointer in cascade configuration
In cascaded applications each PCA8538 in the cascade must be addressed separately.
Initially, the first PCA8538 is selected by sending the Device-address command matching
the first hardware address. Then the data pointer is set to the preferred display RAM
address with the Data-pointer-X and Data-pointer-Y commands.
Storage is allowed only when the content of the device address register matches with the
hardware device address applied to A0 and A1 (see Section 8.2.3). If the content of the
device address register and the hardware device address do not match, then data storage
is inhibited but the data pointer is incremented as if data storage had taken place.
8.14.2 RAM filling
For the following examples showing the RAM filling patterns, it is assumed that the bits
shown in Table 39 are transferred to the RAM.
Table 39. Bit scheme used to illustrate the RAM filling patterns
Bit 7
6
5
4
3
2
1
0
MSB
LSB
Byte
1
aa7
aa6
aa5
aa4
aa3
aa2
aa1
aa0
2
ab7
ab6
ab5
ab4
ab3
ab2
ab1
ab0
:
:
:
:
:
:
:
:
:
204
hk7
hk6
hk5
hk4
hk3
hk2
hk1
hk0
8.14.2.1 RAM filling in static drive mode
In the static drive mode the eight transmitted data bits are placed in eight successive
display RAM columns in row 0 (see Table 40).
Table 40. RAM filling in static drive mode
RAM row/
backplane
output
(COM)
RAM column/Segment output (S)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 :
0
aa7 aa6 aa5 aa4 aa3 aa2 aa1 aa0 ab7 ab6 ab5 ab4 ab3 ab2 ab1 ab0 :
1
----------------:
:
:::::::::::::::::
8
----------------:
99 100 101
am4 am3 am2
---
:::
---
In order to fill the whole RAM row, 13 bytes must be sent to the PCA8538. Any data bits
that spill over the RAM and additional data bytes sent are discarded.
PCA8538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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