PCA8538UG(2014) 查看數據表（PDF） - NXP Semiconductors.
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PCA8538UG Datasheet PDF : 107 Pages
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NXP Semiconductors
PCA8538
Automotive 102 x 9 Chip-On-Glass LCD segment driver
8.12 Segment outputs
The LCD drive section includes 102 segment outputs (S0 to S101) which must be
connected directly to the LCD. The segment output signals are generated based on the
multiplexed backplane signals and with data resident in the display register. When less
than 102 segment outputs are required, the unused segment outputs must be left
open-circuit.
8.13 Display register
The display register holds the display data while the corresponding multiplex signals are
generated.
8.14 Display RAM
The display RAM is a static 102 9-bit RAM which stores LCD data. Logic 1 in the RAM
bit map indicates the on-state, logic 0 the off-state of the corresponding LCD element.
There is a one-to-one correspondence between
• the bits in the RAM bitmap and the LCD segments/elements
• the RAM columns and the segment outputs
• the RAM rows and the backplane outputs.
The display RAM bit map, Figure 34 on page 60, shows row 0 to row 8 which correspond
with the backplane outputs COM0 to COM8, and column 0 to column 101 which
correspond with the segment outputs S0 to S101. In multiplexed LCD applications, the
data of each row of the display RAM is time-multiplexed with the corresponding backplane
(row 0 with COM0, row 1 with COM1, and so on).
When display data is transmitted to the PCA8538, the display bytes received are stored in
the display RAM in accordance with the selected LCD multiplex drive mode. The data is
stored as it arrives and does not wait for the acknowledge cycle as with the commands.
Depending on the current multiplex drive mode, data is stored singularly, in pairs,
quadruples, sextuples or bytes.
8.14.1 Data pointer
The addressing mechanism for the display RAM is realized using a data pointer. This
allows the loading of an individual display data byte, or a series of display data bytes into
any location of the display RAM. The sequence commences with the initialization of the
data pointer by the Data-pointer-X and Data-pointer-Y commands. Following these
commands, an arriving data byte is stored starting at the display RAM address indicated
by the data pointer.
The data pointer is automatically incremented in accordance with the chosen LCD
multiplex drive mode configuration. After each byte is stored, the contents of the data
pointer are incremented
• by eight (static drive mode)
• by four (1:2 multiplex drive mode)
• by two (1:4 multiplex drive mode)
• by one or two (1:6 multiplex drive mode)
PCA8538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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