CS61305A 查看數據表（PDF） - Cirrus Logic
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CS61305A Datasheet PDF : 44 Pages
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APPLICATIONS
CS61305A
RTIP 19
RRING 20
CS61305A
16
TRING
TTIP 13
1
2
R1
3
RECEIVE
R2
5
LINE
6
2CT:1
0.47 µF R3 2
1
R4
6
TRANSMIT
LINE
5
T1
Figure A1. Line Interface Circuitry
Frequency Crystal
MHz
XTL
1.544 (T1) CXT6176
2.048 (E1) CXT8192
Cable
Ω
100
120
75
R1 and R2 LEN2/1/0
Ω
200 0/1/1 - 1/1/1
240
0/0/0
0/0/0
0/0/1
0/0/1
150
0/0/0
0/0/0
0/0/1
0/0/1
T1 turns
ratio
1:1.15
1:2
1:2.3
1:1.26
1:2
1:1
1:2
1:1
1:2
1:1
1:2
R3 and R4
Ω
0
9.4
9.4
0
8.7
0
15
0
9.4
10
14.3
Typical TX
Return Loss
(dB)
0.5
20
28
0.5
12
0.5
30
0.5
24
5
12
Note: Refer to Table A3 for specific transformer recommendations.
Table A1. External Component Values
Line Interface
Figure A1 illustrates the external components for
the line interface circuitry and Table A1 shows
the specific components for each application.
Figures A2-A4 show typical T1 and E1 line inter-
face application circuits. Figure A2 illustrates a
T1 interface in the Host Mode. Figure A3 illus-
trates a 120 Ω E1 interface in the Hardware
Mode. Figure A4 illustrates a 75 Ω E1 interface
in the Extended Hardware Mode.
The receiver transformer has a grounded center
tap on the IC side. Resistors between the RTIP
and RRING pins to ground provide the termina-
tion for the receive line.
DS157PP3
25
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