CS5346
6. REGISTER QUICK REFERENCE
This table shows the register names and their associated default values.
Addr Function
7
6
5
4
01h Chip ID
PART3 PART2 PART1 PART0
pg. 30
1
1
0
0
02h Power Control Freeze Reserved Reserved Reserved
pg. 30
0
0
0
0
03h Reserved
Reserved Reserved Reserved Reserved
0
0
0
0
04h ADC Control
FM1
FM0 Reserved DIF
pg. 31
0
0
0
0
05h MCLK
Frequency
Reserved MCLK
Freq2
MCLK
Freq1
MCLK
Freq0
pg. 32
0
0
0
0
06h PGAOut
Control
Reserved PGAOut Reserved Reserved
pg. 32
0
1
0
0
07h PGA Ch B
Reserved Reserved Gain5
Gain Control
Gain4
pg. 32
0
0
0
0
08h PGA Ch A
Reserved Reserved Gain5
Gain Control
Gain4
pg. 33
0
0
0
0
09h Analog Input Reserved Reserved Reserved PGASoft
Control
pg. 33
0
0
0
1
0Ah - Reserved
0Bh
Reserved Reserved Reserved Reserved
0
0
0
0
0Ch Active Level
Control
Reserved Reserved Reserved Reserved
pg. 34
1
1
0
0
0Dh Interrupt Status Reserved Reserved Reserved Reserved
pg. 34
0
0
0
0
0Eh Interrupt Mask Reserved Reserved Reserved Reserved
pg. 35
0
0
0
0
0Fh Interrupt Mode Reserved Reserved Reserved Reserved
MSB
pg. 35
0
0
0
0
10h Interrupt Mode Reserved Reserved Reserved Reserved
LSB
pg. 35
0
0
0
0
3
REV3
x
PDN_MIC
0
Reserved
1
Reserved
0
Reserved
0
Reserved
0
Gain3
0
Gain3
0
PGAZero
1
Reserved
0
Reserved
0
ClkErr
0
ClkErrM
0
ClkErr1
0
ClkErr0
0
2
REV2
x
PDN_ADC
0
Reserved
0
Mute
0
Reserved
1
REV1
x
Reserved
0
Reserved
0
HPFFreeze
0
Reserved
0
REV0
x
PDN
1
Reserved
0
M/S
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Gain2
0
Gain1
0
Gain0
0
Gain2
0
Gain1
0
Gain0
0
0
0
Sel2
Sel1
Sel0
0
Reserved
0
Reserved
1
Reserved
0
Reserved
0
0
Reserved Active_H/L
0
Reserved
0
Reserved
0
Reserved
0
Ovfl
0
OvflM
0
Ovfl1
0
Undrfl
0
UndrflM
0
Undrfl1
0
Reserved
0
Ovfl0
0
Undrfl0
0
0
0
DS861PP1
29