CS4525(2008) 查看數據表（PDF） - Cirrus Logic
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CS4525 Datasheet PDF : 98 Pages
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XTI SWITCHING SPECIFICATIONS
Parameter
External Crystal Operating Frequency
(Notes 15, 16)
XTI Duty Cycle
Symbol
ClkFreq[1:0] = ‘00’
ClkFreq[1:0] = ‘01’
ClkFreq[1:0] = ‘10’
FCLK
Min
18.240
24.330
26.730
45
Typ
18.432
24.576
27.000
50
Notes: 15. External crystal oscillator mode only available in Software Mode.
CS4525
Max
18.617
24.822
27.270
55
Unit
MHz
MHz
MHz
%
SYS_CLK SWITCHING SPECIFICATIONS
AGND = DGND = PGND = 0 V; TA = 25°C; VD = 3.3 V; Input: Logic 0 = DGND; Logic 1 = VD, SYS_CLK Output:
CL = 20 pF.
Parameter
External Clock Operating Frequency
(Note 16)
Rising Edge RST to start of SYS_CLK
SYS_CLK Period
SYS_CLK Duty Cycle
SYS_CLK high time
SYS_CLK low time
Symbol
ClkFreq[1:0] = ‘00’
ClkFreq[1:0] = ‘01’
ClkFreq[1:0] = ‘10’
FCLK
tsclko
tsclki
tclkih
tclkil
Min
18.240
24.330
26.730
-
37.04
45
16.67
16.67
Typ
18.432
24.576
27.000
1024*tsclki
-
50
-
-
Max
18.617
24.822
27.270
-
54.25
55
29.84
29.84
Unit
MHz
MHz
MHz
ns
%
ns
ns
Notes:
16. ClkFreq[1:0] = ‘10’ mode only in Software Mode. See “Clock Frequency (ClkFreq[1:0])” on page 69
for software mode configuration settings. See “System Clocking” on page 54 for hardware mode
configuration settings.
SYS_CLK
tsclko
(output)
___
RST
Figure 9. SYS_CLK Timing from Reset
PWM_SIGX SWITCHING SPECIFICATIONS
AGND = DGND = PGND = 0 V; TA = 25°C; VD = 3.3 V; Load = 10 pF.
Parameter
Symbol
Min
Typ
Rise Time of PWM_SIGx
Fall Time of PWM_SIGx
tr
-
2.1
tf
-
1.4
Max
-
-
Unit
ns
ns
tr
tf
PWM_SIGx
Figure 10. PWM_SIGX Timing
DS726PP3
23
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