CS5542 查看數據表（PDF） - Cirrus Logic

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CS5542

22-Bit, Multi-Channel ∆Σ ADC Chip Set

Cirrus Logic 

CS5542 CS5543

The Operating Mode Register (OMR) allows ac-

cess to the device operating modes via the DATA-

SEL and DMODE pins as shown in figure 9.

The Bypass Register allows a minimum length path

between the TDI and TDO pins on the device. This

register can be selected whenever the device does

not need to be tested during board-level test opera-

tion.

DATSEL DMODE

TDI 3 2 1 0 2 1 0

OMR Bit # 6 5 4 3 2 1 0

TDO

Figure 9. Operating Mode Register

TAP Operation for EXTEST

Before execution of the instruction EXTEST, the

SAMPLE/PRELOAD instruction must be used to

load testing data to all output pins through TDI.

Each output pin requires two bits. The first bit to

be shifted in controls the output enable function. If

a logic 1 is entered, the output is enabled; if a logic

0 is entered, the output is disabled. The second bit

shifted in after the first bit is the test data. There-

fore, two TCK cycles are required to load testing

data into the boundary-scan register for each output

pin.

Device Identification Register

MSB

31

16

V3 V2 V1 V0 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4

LSB

15

0

P3 P2 P1 P0 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0 1

BIT

V3-V0

P15-P0

M10-M0

L0

NAME

Version Bits

Part Number Bits

Manufacture Number Bits

Logic 1

VALUE

0000

0101010101000011

00001100100

1

FUNCTION

Version Number of Device

Part Number of Device

Manufacture Number

Always Logic 1

Table 7. Device Identification Register

22

DS109PP2

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