CL-PS7111-VC-A データシートの表示（PDF） - Cirrus Logic

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CL-PS7111-VC-A

Low-Power System-on-a-Chip

Cirrus Logic 

CL-PS7111

Low-Power System-on-a-Chip

Table 3-5. Device Select Address Ranges After Boot From On-Chip Boot ROM (cont.)

Address Range (Hexadecimal)

4000.0000 – 4FFF.FFFF

5000.0000 – 5FFF.FFFF

6000.0000 – 6FFF.FFFF

7000.0000 – 7FFF.FFFF

Chip Select

NCS[3]

NCS[2]

NCS[1]

NCS[0]

Table 3-6. Expansion And ROM Interface Bus Width After Boot From On-Chip Boot ROM

Bus Width Field In ROM Test Mode

00

01

10

11

Expansion Transfer Mode

8-bit-wide bus access

Reserved

32-bit-wide bus access

16-bit-wide bus access

3.8.2

CL-PS6700 PCMCIA controller interface

Figure 3-5 shows the interface between the CL-PS6700 and the CL-PS7111. For details on the

CL-PS6700, please refer to the CL-PS6700 Data Book (available under NDA).

PCTL[2:0]

5 V 3 V VPP

POWER

VCC

MODULE VPP

EXPCLK

NCS[5:4]

WRITE

PB[1:0]

NEINT2

RUN

D[15:0]

SYS_RES_L

PCLK

PCE_L

PTYPE

PRDY

PIRQ_L

PSLEEP_L

MD[15:0]

PCM_VS[2:1]

PCM_CD[2:1]

PCM_BVD[2:1]

PCM_WP

PCM_RDY

PCM_WAIT

PCM_RESET

PCM_CE[2:1]

PCM_REG_L

PCM_OE_L

PCM_WE_L

PCM_IORD_L

PCM_IOWR_L

PCM_A[25:0]

PCM_D[15:0]

PCMCIA

SLOT

Figure 3-5. CL-PS7111-to-CL-PS6700 Interface

September 1997

PRELIMINARY DATA BOOK v2.0

27

FUNCTIONAL DESCRIPTION

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