CL-PS7111-VC-A データシートの表示（PDF） - Cirrus Logic
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CL-PS7111-VC-A Datasheet PDF : 105 Pages
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CL-PS7111
Low-Power System-on-a-Chip
3.3 Endian Functionality
The CL-PS7111 uses a little-endian configuration for internal registers. However, it is possible to connect
the device to a big-endian external memory system. Table 3-1 and Table 3-2 demonstrate the behavior of
the CL-PS7111 in big- and little-endian mode, including the effect of performing non-aligned word
accesses. The register definitions in Chapter 5 define the behavior of the internal CL-PS7111 registers in
big-endian mode in more detail.
The NCAS[3:0] lines for DRAM must always be connected with the same byte lane regardless of the
endian functionality, so that NCAS[0] is connected with D[7:0], and NCAS[3] with D[31:24]. In a little-
endian system, NCAS[0] is asserted for a read/write to byte 0 of DRAM and in a big-endian system
NCAS[3] is asserted to access byte 0 of DRAM.
Table 3-1. Endian Functionality and Read Operations
Address
(W/B)
Data in
Memory
Byte Lanes to Memory/Ports/Registers
Big-endian Memory
Little-endian Memory
7:0 15:8 23:16 31:24 7:0 15:8 23:16 31:24
R0 Contents
Big-
endian
Little-
endian
Word + 0 (W) 11223344 44 33
22
Word + 1 (W) 11223344 44 33
22
Word + 2 (W) 11223344 44 33
22
Word + 3 (W) 11223344 44 33
22
Word + 0 (B) 11223344 Xa X
X
Word + 0 (B) 11223344 X
X
22
Word + 0 (B) 11223344 X 33
X
Word + 0 (B) 11223344 44 X
X
11 44 33
22
11 44 33
22
11 44 33
22
11 44 33
22
11 44 X
X
X
X 33
X
X
X
X
22
X
X
X
X
11 11223344 11223344
11 44112233 44112233
11 33441122 33441122
11 22334411 22334411
X
00000011 00000044
X
00000022 00000033
X
00000033 00000022
11 00000044 00000011
a X indicates a ‘don’t care’ state.
Table 3-2. Endian Functionality and Write Operations
Byte Lanes to Memory/Ports/Registers
Address (W/B) Register Contents
Big-endian Memory
Little-endian Memory
7:0 15:8 23:16 31:24 7:0 15:8 23:16 31:24
Word + 0 (W)
Word + 1 (W)
Word + 2 (W)
Word + 3 (W)
Word + 0 (B)
11223344
11223344
11223344
11223344
11223344
44 33
22
11 44 33
22
11
44 33
22
11 44 33
22
11
44 33
22
11 44 33
22
11
44 33
22
11 44 33
22
11
44 44
44
44a 44 44
44
44
September 1997
PRELIMINARY DATA BOOK v2.0
21
FUNCTIONAL DESCRIPTION
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