CRD8900-1 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CRD8900-1

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

forms a complete reset, and then goes through a

normal initialization procedure.

Software Suspend

Software (SW) Suspend mode can be used to

conserve power in applications, like adapter

cards, that do not have power management cir-

cuitry available. During this mode, all internal

circuits are shut off except the I/O Base Address

register (PacketPage base + 0020h) and the

SelfCTR register (Register 15).

To enter SW Suspend mode, the host must set

the SWSuspend bit (Register 15, SelfCTL, bit 8).

To exit SW Suspend, the host must write to the

CS8900’s assigned I/O space (the Write is only

used to wake the CS8900, the Write itself is ig-

nored). Upon exit, the CS8900 performs a

complete reset, and then goes through a normal

initialization procedure.

Any hardware reset takes the chip out of any

sleep mode.

Table 3.8 summarizes the operation of the three

low-power modes.

3.8 LED Outputs

The CS8900 provides three output pins that can

be used to control LEDs or external logic.

HC0E

(Bit C)

0

1

1

HCB0

(Bit E)

N/A

0

1

Pin Function

Pin configured as LINKLED: Output

is low when valid 10BASE-T link

pulses are detected. Output is high

if valid link pulses are not detected

Pin configured as HC0:

Output is high

Pin configured as HC0:

Output is low

Table 3.9. LINKLED/HC0 Pin Operation

LANLED: LANLED goes low whenever the

CS8900 transmits or receives a frame, or when it

detects a collision. LANLED remains low until

there has been no activity for 6 ms (i.e. each

transmission, reception, or collision produces a

pulse lasting a minimum of 6 ms).

LINKLED or HC0: LINKLED or HC0 can be

controlled by either the CS8900 or the host.

When controlled by the CS8900, LINKLED is

low whenever the CS8900 receives valid

10BASE-T link pulses. To configure this pin for

CS8900 control, the HC0E bit (Register 15,

SelfCTL, Bit C) must be clear. When controlled

by the host, LINKLED is low whenever the

HCB0 bit (Register 15, SelfCTL, Bit E) is set.

To configure it for host control, the HC0E bit

must be set. Table 3.9 summarizes this operation.

HC1E

(Bit D)

0

1

1

HCB1

(Bit F)

N/A

0

1

Pin Function

Pin configured as BSTATUS: Output

is low when a receive frame begins

transfer across the ISA bus. Output

is high otherwise.

Pin configured as HC1:

Output is high

Pin configured as HC1:

Output is low

Table 3.10. BSTATUS/HC1 Pin Operation

BSTATUS or HC1: BSTATUS or HC1 can be

controlled by either the CS8900 or the host.

When controlled by the CS8900, BSTATUS is

low whenever the host reads the RxEvent regis-

ter (PacketPage base + 0124h), signaling the

transfer of a receive frame across the ISA bus.

To configure this pin for CS8900 control, the

HC1E bit (Register 15, SelfCTL, Bit D) must be

clear. When controlled by the host, BSTATUS is

low whenever the HCB1 bit (Register 15,

SelfCTL, Bit F) is set. To configure it for host

control, HC1E must be set. Table 3.10 summa-

rizes this operation.

24

DS150PP2

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