AT89C51CC03
Table 39. TL2 Register
TL2 (S:CCh)
Timer 2 Low Byte Register
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
Bit
Bit
Number Mnemonic Description
7-0
Low Byte of Timer 2.
Reset Value = 0000 0000b
Not bit addressable
Table 40. RCAP2H Register
RCAP2H (S:CBh)
Timer 2 Reload/Capture High Byte Register
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
Bit
Number
7-0
Bit
Mnemonic Description
High Byte of Timer 2 Reload/Capture.
Reset Value = 0000 0000b
Not bit addressable
Table 41. RCAP2L Register
RCAP2L (S:CAH)
TIMER 2 REload/Capture Low Byte Register
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
Bit
Bit
Number Mnemonic Description
7-0
Low Byte of Timer 2 Reload/Capture.
Reset Value = 0000 0000b
Not bit addressable
81
4182K–CAN–05/06