Table 37. T2MOD Register
T2MOD (S:C9h)
Timer 2 Mode Control Register
7
6
5
4
3
2
1
-
-
-
-
-
-
T2OE
Bit
Bit
Number Mnemonic Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 2 Output Enable bit
1
T2OE Clear to program P1.0/T2 as clock input or I/O port.
Set to program P1.0/T2 as clock output.
Down Counter Enable bit
0
DCEN Clear to disable timer 2 as up/down counter.
Set to enable timer 2 as up/down counter.
Reset Value = XXXX XX00b
Not bit addressable
Table 38. TH2 Register
TH2 (S:CDh)
Timer 2 High Byte Register
7
6
5
4
3
2
1
-
-
-
-
-
-
-
Bit
Bit
Number Mnemonic Description
7-0
High Byte of Timer 2.
Reset Value = 0000 0000b
Not bit addressable
0
DCEN
0
-
80 AT89C51CC03
4182K–CAN–05/06