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AT89C51CC03C-RLTIM View Datasheet(PDF) - Atmel Corporation

Part Name
Description
MFG CO.
AT89C51CC03C-RLTIM
Atmel
Atmel Corporation 
AT89C51CC03C-RLTIM Datasheet PDF : 197 Pages
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Interrupt
Registers
4182K–CAN–05/06
AT89C51CC03
Each Timer handles one interrupt source that is the timer overflow flag TF0 or TF1. This
flag is set every time an overflow occurs. Flags are cleared when vectoring to the Timer
interrupt routine. Interrupts are enabled by setting ETx bit in IEN0 register. This assumes
interrupts are globally enabled by setting EA bit in IEN0 register.
Figure 39. Timer Interrupt System
TF0
TCON.5
TF1
TCON.7
ET0
IEN0.1
ET1
IEN0.3
Timer 0
Interrupt Request
Timer 1
Interrupt Request
Table 30. TCON Register
TCON (S:88h)
Timer/Counter Control Register
7
6
5
4
3
2
1
0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Bit
Number
7
6
Bit
Mnemonic Description
Timer 1 Overflow Flag
TF1 Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 1 register overflows.
Timer 1 Run Control Bit
TR1 Clear to turn off Timer/Counter 1.
Set to turn on Timer/Counter 1.
Timer 0 Overflow Flag
5
TF0 Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 0 register overflows.
Timer 0 Run Control Bit
4
TR0 Clear to turn off Timer/Counter 0.
Set to turn on Timer/Counter 0.
Interrupt 1 Edge Flag
3
IE1 Cleared by hardware when interrupt is processed if edge-triggered (see IT1).
Set by hardware when external interrupt is detected on INT1# pin.
Interrupt 1 Type Control Bit
2
IT1 Clear to select low level active (level triggered) for external interrupt 1 (INT1#).
Set to select falling edge active (edge triggered) for external interrupt 1.
Interrupt 0 Edge Flag
1
IE0 Cleared by hardware when interrupt is processed if edge-triggered (see IT0).
Set by hardware when external interrupt is detected on INT0# pin.
Interrupt 0 Type Control Bit
0
IT0 Clear to select low level active (level triggered) for external interrupt 0 (INT0#).
Set to select falling edge active (edge triggered) for external interrupt 0.
Reset Value = 0000 0000b
73

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