AT89C51CC03C-RLTIM View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

AT89C51CC03C-RLTIM

Enhanced 8-bit MCU with CAN Controller and Flash Memory

Atmel Corporation 

Figure 75. A/D Converter Clock

CPU

CLOCK

÷2

CPU Core Clock Symbol

Prescaler ADCLK

ADC Clock

A/D

Converter

ADC Standby Mode

IT ADC Management

Routines examples

When the ADC is not used, it is possible to set it in standby mode by clearing bit ADEN

in ADCON register. In this mode its power dissipation is about 1 µW.

An interrupt end-of-conversion will occurs when the bit ADEOC is activated and the bit

EADC is set. For re-arming the interrupt the bit ADEOC must be cleared by software.

Figure 76. ADC Interrupt Structure

ADEOC

ADCON.2

EADC

IEN1.1

ADCI

1. Configure P1.2 and P1.3 in ADC channels

// configure channel P1.2 and P1.3 for ADC

ADCF = 0Ch

// Enable the ADC

ADCON = 20h

2. Start a standard conversion

// The variable "channel" contains the channel to convert

// The variable "value_converted" is an unsigned int

// Clear the field SCH[2:0]

ADCON and = F8h

// Select channel

ADCON | = channel

// Start conversion in standard mode

ADCON | = 08h

// Wait flag End of conversion

while((ADCON and 01h)! = 01h)

// Clear the End of conversion flag

ADCON and = EFh

// read the value

value_converted = (ADDH << 2)+(ADDL)

3. Start a precision conversion (need interrupt ADC)

// The variable "channel" contains the channel to convert

// Enable ADC

156 AT89C51CC03

4182K–CAN–05/06

Share Link: