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CS5376 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CS5376 Datasheet PDF : 122 Pages
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CS5376
SDTKI
SDRDY
SDCLK
SDDAT
MSB
LSB
Figure 46. Serial Data Output Port Transaction
10.2 Serial Data Transactions
To initiate a serial data output port transaction, the
SDTKI chip select pin must receive a rising edge.
If output data words are available in the data FIFO,
the CS5376 immediately pulls the SDRDY pin low
to signal the start of an SD port transaction. The SD
port holds SDRDY low until all data has been
clocked from the data FIFO.
Once SDRDY goes low, the communications con-
troller pulls 32-bit data words MSB first from the
SDDAT output pin by clocking the SDCLK input
pin. Serial data on the SDDAT output pin is valid
on the rising edge of SDCLK, and transitions on the
falling edge. The first eight data bits are a status
byte that indicates the channel number, the time
break flag, and any error conditions. The status
byte is followed by 24 bits of twos complement
conversion data for the indicated channel. For sys-
tems that dont require status information, the sta-
tus byte can be ignored by receiving the 32 bit data
word into a 24-bit shift register. Clocking 32 bits
into a 24-bit register causes the status bits to shift
out the end.
When the last available data bit is clocked from the
SD port data FIFO, the SDRDY pin returns high
and the SDTKO pin will pulse to signal the end of
the SD port transaction. SDTKO can be used to sig-
nal the communications controller of the end of a
transaction, or can be used to daisy chain multiple
CS5376 devices into a simple token ring by con-
necting it to the SDTKI pin of another CS5376 de-
vice.
If the SDTKI pin receives a rising edge and no
words are available in the data FIFO, the SDRDY
pin remains high and the SDTKO output pin is
pulsed immediately.
10.3 SD Port Configurations
The SD port can operate in two configurations, a
continuous output configuration where data is out-
put immediately when ready, or a requested output
configuration where data is output only when
polled by the communications controller.
Continuous Output Configuration
The continuous output SD port configuration re-
quires the SDTKI pin to receive continuous rising
edges. A simple method for generating rising edg-
es on SDTKI is to connect it to a 4 MHz or slower
system clock. Whenever output data is available
from the decimation engine, a rising edge on SDT-
KI initiates an SD port transaction.
Once an SD port transaction is initiated, the SDTKI
signal must be gated off to ensure no rising edges
DS256PP1
72

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