CS5376-BS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5376-BS

Low Power Multi-Channel Decimation Filter

Cirrus Logic 

CS5376

SPI 1

Control Logic

8-bit Shift Register

Pin Logic

SCK1

MISO

MOSI

SSI

SSO

SINT

To

Decimation

Engine

SPI 1

Registers

Chip

Select

Logic

CS8

CS9

CS10

CS11

Figure 10. Serial Peripheral Interface 1 (SPI 1) Block Diagram

5. SERIAL PERIPHERAL INTERFACE 1

The Serial Peripheral Interface 1 (SPI 1) port is an

industry standard master / slave SPI interface, and

is the primary interface to the CS5376 decimation

engine. The port operates as an SPI bus master

when booting from a configuration EEPROM in

stand-alone mode, and as an SPI slave when com-

municating with a microcontroller in coprocessor

mode.

Master Mode

The SPI 1 port operates in master mode only while

loading configuration information from EEPROM

during stand-alone boot mode. In this mode the

CS5376 actively initiates serial transactions to read

configuration register values, digital filter coeffi-

cients, and test bit stream data from EEPROM

memory. After booting from EEPROM, the SPI 1

port reverts to slave mode to interface with a micro-

controller, if present.

Master mode serial transactions in the CS5376 gen-

erate a chip select output on the CS11 / GPIO11

pin, and a serial clock output on the SCK1 pin. Se-

rial data is output from the CS5376 on the MOSI

pin, and input from the EEPROM on the MISO pin.

To be compatible with many serial EEPROMs,

transactions in master mode use 16-bit addresses,

different from the 8-bit addresses required when

accessing the CS5376 in slave mode.

Slave Mode

When booting from a microcontroller in coproces-

sor mode, or after booting from EEPROM in stand-

alone mode has completed, the SPI 1 port operates

in slave mode. In slave mode the CS5376 is pas-

sive, with serial transactions initiated by a micro-

controller or other SPI bus master. The

microcontroller uses SPI 1 commands to write con-

figuration register values, digital filter coefficients,

and test bit stream data from a local memory or

from the communications channel.

Slave mode serial transactions require the micro-

controller to use the SSI pin as the CS5376 chip se-

lect, and to generate a serial clock input on the

SCK1 pin. Serial data is received from the micro-

controller on the MOSI pin, and output from the

CS5376 on the MISO pin.

When pulled low the SSI pin (Slave Select Input)

places the SPI 1 port into a default configuration

that requires 8-bit addresses, different from the 16-

DS256PP1

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