CS61318-IP View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS61318-IP Datasheet PDF : 28 Pages
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CS61318
The amplitude of each phase is described by a 7-bit,
2’s compliment number, where a positive value de-
scribes pulse amplitude, and a negative value de-
scribes pulse undershoot. The positive full value is
hex 3F. The negative full value is hex 40. For E1
shielded twisted pair, the typical output voltage is
27 mV/LSB. All voltages are peak voltages across
the TTIP and TRING outputs.
Using the circuits given in the Applications section
of the data sheet, the output impedance of the de-
vice will be approximately equal to the impedance
of the line. This means that the voltage on the trans-
former secondary will be twice the values stated
above. Note that although the full scale digital in-
put is 3F, it is recommended that full scale output
voltage on the transformer primary be limited to
2.4 Vpk. At higher output voltages, the driver may
not drive the requested output voltage.
The amplitude information for all phases is written
via the serial-port to Arbitrary Waveform RAM
registers (see Arbitrary Waveform RAM register
for description). Each phase amplitude is written as
an eight-bit byte, where the first phase of the sym-
bol is written first.
The contents of the Arbitrary Waveform RAM can
be verified by performing a read operation. Read-
ing the waveform RAM requires first writing the
Address/Command Byte with the R/W bit set to
“1” (see Figure 10) followed by a data byte which
specifies the RAM address to be read. On subse-
quent SCLK’s the contents of the specified RAM
location will be clocked out on SDO.
Diagnostic Mode
Loopback Modes
Local Loopback (LLOOP)
Remote Loopback (RLOOP)
In-band Network Loopback (NLOOP)
Internal Data Pattern Generation and Detection
Transmit All Ones (TAOS)
In-band Loop-up/down Code Generator
Error Detection
Bipolar Violation Detection (BPV)
Alarm Condition Monitoring
Receive Loss of Signal Monitoring (LOS)
Receive Alarm Indication Signal Monitoring (AIS)
Other Diagnostic Reports
Receive Line Attenuation Indicator (LATN)
Availability (Note 1)
H/W Host
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Host Mode (Note 2)
Maskable
No
No
Yes
No
No
No
Yes
Yes
No
Table 4. CS61318 Diagnostic Mode Availability
Notes: 1. In Hardware Mode the Diagnostic Modes are selected by directly setting the pins on the device; in Host
Mode, the appropriate register bits are written for Diagnostic Modes.
2. In Host Mode the interrupts can be masked by writing a “1” to the LOS bit; there is no masking in the
Hardware Mode.
DS441PP2
17
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