CS61318-IP View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS61318-IP Datasheet PDF : 28 Pages
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CS61318
2.11.2 Control Register 2: Address 0x11
7 (MSB)
AIS
6
RAMPLSE
5
RSVD
4
LOOPDN
3
LOOPUP
2
RPWDN
1
TxHIZ
0 (LSB)
RSVD
AIS
Alarm Indication Signal.
AIS = 1 when an all ones pattern is present at the receiver. This bit is reset to “0” by the first
read occurring after the AIS condition has cleared.
An interrupt will occur when AIS is present unless a “1” is written to AIS disabling the interrupt.
RAMPLSE
When RAMPLSE = 1, output pulse shapes are determined by the codes in the internal, pro-
grammable, transmit RAM.
RSVD
Reserved
Set to “0” for proper operation.
LOOPDN
Loop Down
In Long Haul mode, setting LOOPDN to “1” causes the data pattern 001... to be repetitively
transmitted.
LOOPUP
Loop Up
In Long Haul mode, setting LOOPUP to “1” causes the data pattern 00001... to be repetitively
transmitted.
RPWDN
Receiver Power Down
When RPWDN = 1, the receiver circuitry is powered down, but the transmitter is still active.
TxHIZ
Transmitter High Impedance
When TxHIZ = 1 the transmitter goes to a low-power, high-impedance state
2.11.3 Equalizer Gain (EQGAIN): Address 0x12
7 (MSB)
6
X
X
5
4
3
2
1
0 (LSB)
X
EQ4
EQ3
EQ2
EQ1
EQ0
EQ[4:0]
The receive equalizer gain settings are broken down into 20 segments and provided at the five
LSBs of this register, EQ4 - EQ0. 00001 corresponds to -2 dB, 10100 corresponds to -40 dB.
The three MSBs are don’t cares.
2.11.4 Arbitrary Waveform RAM Address (RAM): Address 0x13
7 (MSB)
RAM.7
6
RAM.6
5
RAM.5
4
RAM.4
3
RAM.3
2
RAM.2
1
RAM.1
0 (LSB)
RAM.0
RAM[7:0]
Arbitrary Waveform RAM;
Onboard RAM is provided so that custom pulse shapes may be downloaded (see Arbitrary
Waveform Generation section). Writing the waveform RAM requires first writing the Ad-
dress/Command Byte with the write bit set (see Figure 10) followed by a data byte which spec-
ifies the RAM address to be written. Following these two bytes is a third byte that represents
the waveform coefficient to be stored in the target address. There are 42 RAM byte locations
(numbered h00 to h29).
14
DS441PP2
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