PCA8538UG(2014) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
PCA8538UG Datasheet PDF : 107 Pages
| |||
NXP Semiconductors
PCA8538
Automotive 102 x 9 Chip-On-Glass LCD segment driver
9.3 SPI interface
The SPI interface is selected by connecting pin IFS to VSS1.
Data transfer to the device is made via a four-line SPI-bus (see Table 49). The SPI-bus is
initialized whenever the chip enable line pin CE is LOW.
Table 49. Serial interface
Symbol Function
CE
chip enable input;
active LOW[1]
SCL
serial clock input
SDI/SDAIN serial data input
SDO
serial data output
Description
when HIGH, the interface is reset
input may be higher than VDD1
input may be higher than VDD1;
input data is sampled on the rising edge of SCL
-
[1] The chip enable must not be wired permanently LOW.
9.3.1 Data transmission
The chip enable signal (CE) is used to initialize data transmission. Each data transfer is a
byte, with the MSB sent first. The first byte transmitted is the subaddress byte.
GDWDEXV
68%$''5(66
'$7$
'$7$
'$7$
&(
Fig 44. SPI-bus protocol - data transfer overview
DDD
The subaddress byte opens the communication with a read/write bit and a subaddress.
The subaddress is used to identify multiple devices on one SPI bus.
Table 50. Subaddress byte definition
Bit
Symbol
Value
7
R/W
0
1
6 to 5 SA
01
4 to 0 -
Description
data read or write selection
write data
read data
subaddress; other codes cause the device to
ignore data transfer
unused
Figure 45 shows an example of an SPI data transfer.
PCA8538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
68 of 107
Share Link: 