PCA8538UG(2014) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
PCA8538UG Datasheet PDF : 107 Pages
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NXP Semiconductors
PCA8538
Automotive 102 x 9 Chip-On-Glass LCD segment driver
9.2.8 I2C-bus protocol
The I2C-bus protocol is shown in Figure 42. The sequence is initiated with a START
condition (S) from the I2C-bus master which is followed by one of the four PCA8538 slave
addresses available. All PCA8538 with the corresponding SA1 and SA0 level
acknowledge in parallel to the slave address, but all PCA8538 with the alternative SA1
and SA0 levels ignore the whole I2C-bus transfer.
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Fig 42. I2C-bus protocol - write mode
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After acknowledgement, a control byte follows which defines if the next byte is RAM or
command information. The control byte (see Table 46 on page 63) also defines whether
the next byte is a control byte or further RAM or command data.
For a temperature readout (see Section 8.10.4.1 on page 38), the R/W bit must be logic 1.
The next data byte following is provided by the PCA8538 as shown in Figure 43.
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Fig 43. I2C-bus protocol - read mode
PCA8538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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