CS5462-IS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5462-IS

Low Cost Power/Energy IC with Pulse Output

Cirrus Logic 

CS5462

means that E1 and E2 should have an average

pulse output frequency of 2 Hz * 72% = 1.44 Hz

and FOUT should have an average pulse output

frequency of 10 kHz * 72% = 7.2 kHz. Assuming

that FOUT is used for calibration (although the gain

error will be the same for E1 and E2), FOUT should

be measured to find the gain error. Suppose the

measured pulse output frequency is 6.96 6kHz in-

stead of 7. 2kHz. 6.99 6kHz is 96.76% of 7. 2kHz.

This means that the gain error is 96.76% -

100% = -3.24%. This error can be calibrated out by

connecting CAL1 to P2 and CAL0 to P2 (see Fig-

ure 7 for all connection options). This will adjust the

CAL0 connected to:

P1 P2 P3 P4 P5 P6 P7

P1 +4.8% +4.6% +4.4% +4.2% +4.0% +3.8% +3.6%

P2 +3.4% +3.2% +3.0% +2.8% +2.6% +2.4% +2.2%

CAL1 P3 +2.0% +1.8% +1.6% +1.4% +1.2% +1.0% +0.8%

connected P4 +0.6% +0.4% +0.2% +0.0% -0.2% -0.4% -0.6%

to: P5 -0.8% -1.0% -1.2% -1.4% -1.6% -1.8% -2.0%

P6 -2.2% -2.4% -2.6% -2.8% -3.0% -3.2% -3.4%

P7 -3.6% -3.8% -4.0% -4.2% -4.4% -4.6% -4.8%

Figure 7. Power-on Reset

pulse rate frequency by 2.8% + 0.4% = 3.2%

(since the smallest calibration step size is 0.2%,

3.2% is the closest value that can offset the error

of -3.24). After these connections are made the av-

erage pulse output frequency of FOUT, E1, and E2

will have a gain error less than or equal to -0.04%

of full scale.

15

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