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CL-PD6833 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CL-PD6833
Cirrus-Logic
Cirrus Logic 
CL-PD6833 Datasheet PDF : 216 Pages
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CL-PD6833
PCI-to-CardBus Host Adapter
13.11 Master Clear
Register Name: Master Clear
I/O Index: Dh
Register Per: socket
Register Compatibility Type: DMA
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Master Clear
R/W:0
Bits 7:0 — Master Clear
This register emulates the Master Clear register of the Intel 8237. Unlike the Intel 8237, there is
no temporary register to read back, so read back is not supported. When this register is written,
the DMA section of the CL-PD6833 assumes the same state as caused by PCI_RST. The DMA
Slave Configuration register is unaffected by writes to this register.
13.12 Mask Register
Register Name: Mask Register
I/O Index: Fh
Register Per: socket
Register Compatibility Type: DMA
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Mask
R/W:0
R/W:0
This register emulates the Mask registers of the Intel 8237. Unlike the Intel 8237, there is only one channel
represented here. Read back is supported.
Bit 0 — Mask
When this bit is ‘1’, the DREQ from the PC Card is ignored. When this bit is ‘0’, DMA requests are
enabled. This bit is automatically set if the Autoinitialize bit is not set when a transfer completes.
Bits 7:1 — Reserved
178
DMA OPERATION REGISTERS
ADVANCE DATA BOOK v0.3
June 1998

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