CL-PD6833
PCI-to-CardBus Host Adapter
13.8 DMA Command and Status
Register Name: DMA Command and Status
I/O Index: 8h
Bit 7
Bit 6
Bit 5
Bit 4
DACK Sense DREQ Sense
Extended
Write Select
Rotating
Priority
R:0
R:0
R:0
R:0
Bit 3
Compressed
Timing
R/W:0
Register Per: socket
Register Compatibility Type: DMA
Bit 2
Bit 1
Bit 0
Controller Address Hold Mem-to-Mem
Disable
Enable
Enable
R:0
R:0
R/W:0
Bit 0 — Mem-to-Mem Enable
Reads from this bit return terminal count.
Bit 1 — Address Hold Enable
Reads from this bit return terminal count.
Bit 2 — Controller Disable
This bit disables DMA transfers. Reads from this bit return terminal count.
Bit 3 — Compressed Timing
Reads from this bit return terminal count.
Bit 4 — Rotating Priority
Reads from this bit return the state of the PC Card DMA request line inverted.
Bit 5 — Extended Write Select
Reads from this bit return the state of the PC Card DMA request line inverted.
Bit 6 — DREQ Sense
Reads from this bit return the state of the PC Card DMA request line inverted.
Bit 7 — DACK Sense
Reads from this bit return the state of the PC Card DMA request line inverted.
June 1998
ADVANCE DATA BOOK v0.3
DMA OPERATION REGISTERS
175