C8051F380/1/2/3/4/5/6/7/C
USB Register Definition 21.12. OUT1INT: USB0 OUT Endpoint Interrupt
Bit
7
6
5
4
3
2
1
0
Name
OUT3
OUT2
OUT1
Type
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
USB Register Address = 0x04
Bit Name
Function
7:4 Unused Read = 0000b. Write = don’t care.
3
OUT3 OUT Endpoint 3 Interrupt-Pending Flag.
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 3 interrupt inactive.
1: OUT Endpoint 3 interrupt active.
2
OUT2 OUT Endpoint 2 Interrupt-Pending Flag.
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 2 interrupt inactive.
1: OUT Endpoint 2 interrupt active.
1
OUT1 OUT Endpoint 1 Interrupt-Pending Flag.
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 1 interrupt inactive.
1: OUT Endpoint 1 interrupt active.
0 Unused Read = 0b. Write = don’t care.
188
Rev. 1.4