C8051F380/1/2/3/4/5/6/7/C
USB Register Definition 21.11. IN1INT: USB0 IN Endpoint Interrupt
Bit
7
6
5
4
3
2
1
0
Name
IN3
IN2
IN1
EP0
Type
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
USB Register Address = 0x02
Bit Name
Function
7:4 Unused Read = 0000b. Write = don’t care.
3
IN3
IN Endpoint 3 Interrupt-Pending Flag.
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 3 interrupt inactive.
1: IN Endpoint 3 interrupt active.
2
IN2
IN Endpoint 2 Interrupt-Pending Flag.
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 2 interrupt inactive.
1: IN Endpoint 2 interrupt active.
1
IN1
IN Endpoint 1 Interrupt-Pending Flag.
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 1 interrupt inactive.
1: IN Endpoint 1 interrupt active.
0
EP0 Endpoint 0 Interrupt-Pending Flag.
This bit is cleared when software reads the IN1INT register.
0: Endpoint 0 interrupt inactive.
1: Endpoint 0 interrupt active.
Rev. 1.4
187