C8051F380/1/2/3/4/5/6/7/C
USB Register Definition 21.15. OUT1IE: USB0 OUT Endpoint Interrupt Enable
Bit
7
6
5
4
3
2
1
0
Name
OUT3E OUT2E OUT1E
Type
R
R
R
R
R/W
R/W
R/W
R
Reset
0
0
0
0
1
1
1
0
USB Register Address = 0x09
Bit Name
Function
7:4 Unused Read = 0000b. Write = don’t care.
3 OUT3E OUT Endpoint 3 Interrupt Enable.
0: OUT Endpoint 3 interrupt disabled.
1: OUT Endpoint 3 interrupt enabled.
2 OUT2E OUT Endpoint 2 Interrupt Enable.
0: OUT Endpoint 2 interrupt disabled.
1: OUT Endpoint 2 interrupt enabled.
1 OUT1E OUT Endpoint 1 Interrupt Enable.
0: OUT Endpoint 1 interrupt disabled.
1: OUT Endpoint 1 interrupt enabled.
0 Unused Read = 0b. Write = don’t care.
Rev. 1.4
191