ACS8522AT View Datasheet(PDF) - Semtech Corporation

Part Name

Description

MFG CO.

ACS8522AT

Synchronous Equipment Timing Source for Stratum 3/4E/4 and SMC Systems

Semtech Corporation 

ACS8522A SETS LITE

ADVANCED COMMS & SENSING

FINAL

Table 11 Output Reference Source Selection Table

Port

Name

Output Port

Technology

Frequencies Supported

O1

LVDS/PECL

(LVDS default)

O2

TTL/CMOS

Frequency selection as per Table 12 and Table 16

O3

TTL/CMOS

O4

TTL/CMOS

FrSync TTL/CMOS

MFrSync TTL/CMOS

FrSync, 8 kHz programmable pulse width and polarity, see Reg. 7A.

MFrSync, 2 kHz programmable pulse width and polarity, see Reg. 7A.

DATASHEET

Note...1.544 MHz/2.048 MHz are shown for SONET/SDH respectively. Pin SONSDHB controls default, when High SONET is default.

Table 12 Output Frequency Selection

Frequency (MHz, unless stated otherwise)

T0 DPLL Mode

T4 DPLL Mode

2 kHz

2 kHz

8 kHz

8 kHz

1.536 (not O4)

1.536 (not O4)

1.544 (not O4)

1.544 (not O4)

1.544 via Digital1, or Digital2 (not O1)

1.544 via Digital1, or Digital2 (not O1)

2.048

2.048

2.048 (not O4)

2.048 (not O4)

2.048 (not O1)

2.048 via Digital1, or Digital2 (not O1)

77.76 MHz Analog

Any digital feedback

mode

77.76 MHz Analog

Any digital feedback

mode

-

-

-

-

-

-

-

-

12E1 mode

-

16DS1 mode

-

77.76 MHz Analog

Any digital feedback

mode

-

-

-

-

12E1 mode

77.76 MHz Analog

-

-

12E1 mode

-

16E1 mode

-

-

-

T4 APLL Input Mux

-

-

Jitter Level (typ)

rms pk-pk

(ps) (ns)

60 0.6

1400 5

-

60 0.6

-

1400 5

Select T4 DPLL

500 2.3

Select T0 DPLL 12E1 250 1.5

Select T4 DPLL

200 1.2

Select T0 DPLL

16DS1

150 1.0

-

3800 13

-

3800 18

Select T4 DPLL

500 2.3

Select T0 DPLL 12E1 250 1.5

Select T4 DPLL

400 2.0

Select T0 DPLL 16E1 220 1.2

-

900 4.5

-

3800 13

Revision 1.00/September 2007 © Semtech Corp.

Page 30

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