PIN DESCRIPTION
2.3. SIGNAL DETAIL
The resulting interface is then dynamically muxed
with the IDE Interface.
The muxing between ISA, LOCAL BUS and
PCMCIA is performed by external strap options.
Table 2-4. Multiplexed Signals (on the same pin)
IDE Pin Name
DIORDY
DA[2]
DA[1:0]
SCS3,SCS1
PCS3,PCS1
DD[15]
DD[14]
DD[13:12]
DD[11:0]
ISAOE# = 1
ISA Pin Name
IOCHRDY
LA[19]
LA[18:17]
LA[23:22]
LA[21:20]
RMRTCCS#
KBCS#
RTCRW#, RTCDS#
SA[19:8]
SD[15:0]
RTCAS
DEV_CLK
SA[3]
SA[2:0]
SMEMW#
IOCS16#
MASTER#
MCS16#
DACK_ENC [2:0]
TC
SA[7:4]
ZWS#
GPIOCS#
IOCHCK#
REF#
IOW#
IOR#
MEMR#
ALE
AEN
BHE#
MEMW#
SMEMR#
DREQ_MUX#[1:0]
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
ISAOE# = 0
PCMCIA Pin Names
-
=0
A[25:24]
A[23:22]
A[21:20]
ROMCS#
Hi-Z
Hi-Z
A[19:8]
D[15:0]
=0
DEV_CLK
A[3]
A[2:0]
VPP_PGM
WP/IOIS16#
BVD1
=0
= 0x04
=0
A[7:4]
GPI#
VCC5_EN
BVD2
RESET
IOWR#
IORD#
=0
=0
WAIT#
OE#
=0
VCC3_EN
CE2#, CE1#
Hi-Z
VPP_VCC
WE#
REG#
READY#
CD1#, CD2#
ISAOE# = 0
Local Bus Pin Name
PD[15:0]
FCS0#
FCS1#
PRDY
IOCS#[2:0]
PBE#[1]
PBE#[0]
PRD#
PWR#
PA[2:0]
PA[3]
PA[7:4]
PA[8]
PA[9]
PA[10]
PA[11]
PA[12]
PA[13]
PA[14]
PA[15]
PA[16]
PA[17]
PA[18]
PA[19]
PA[21:20]
PA[22]
PA[23]
PA[24]
IOCS#[7]
IOCS#[6]
IOCS#[5], IOCS#[4]
IOCS#[3]
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Issue 1.0 - July 24, 2002