STPCC4 数据手册 ( 数据表 ) - STMicroelectronics

DESCRIPTION
The STPC Consumer-II integrates a standard 5th generation x86 core, a Synchronous DRAM controller, a graphics subsystem, a video pipeline, and support logic including PCI, ISA, and IDE controllers to provide a single consumer orientated PC compatible subsystem on a single device.
The device is based on a tightly coupled Unified Memory Architecture (UMA), sharing memory between the CPU, the graphics and the video.
The STPC Consumer-II is packaged in a 388 Plastic Ball Grid Array (PBGA).

■ POWERFUL x86 PROCESSOR
■ 64-BIT SDRAM UMA CONTROLLER
■ VGA & SVGA CRT CONTROLLER
■ 135 MHz RAMDAC
■ 2D GRAPHICS ENGINE
■ VIDEO INPUT PORT
■ VIDEO PIPELINE
   - UP-SCALER
   - VIDEO COLOUR SPACE CONVERTER
   - CHROMA & COLOUR KEY SUPPORT
■ TV OUTPUT
   - THREE-LINE FLICKER FILTER
   - ITU-R 601/656 SCAN CONVERTER
   - NTSC / PAL COMPOSITE, RGB, S-VIDEO
■ PCI MASTER / SLAVE / ARBITER
■ ISA MASTER / SLAVE
■ OPTIONAL 16-BIT LOCAL BUS INTERFACE
■ EIDE CONTROLLER
■ I²C INTERFACE
■ IPC
   - DMA CONTROLLER
   - INTERRUPT CONTROLLER
   - TIMER / COUNTERS
■ POWER MANAGEMENT UNIT
■ JTAG IEEE1149.1